1. Field of the Invention
The present invention relates generally to a charge transfer device, and is directed more particularly to a charge transfer device suitable for use in a CCD (charge coupled device) solid state image pick-up element.
2. Description of the Prior Art
In general, a CCD solid state image pick-up element of a surface channel type is introduced with a bias charge of fat "0" so as to reduce the influence by its surface state. It is, however, difficult to introduce the bias charge to respective registers of the element uniformly and hence the apply of the bias charge may cause a fixed pattern noise. By way of example, in case of a CCD solid state image pick-up element of a frame transfer system, the fact that the image portion thereof is made as the surface channel type simplifies the wafer process thereof and requires no special counter means for the blooming control. However, on the other hand, the pick-up element is easily affected by the surface state and hence the transfer efficiency thereof is apt to be deteriorated. To cope with the above defect, in the prior art, the following methods are well known so as to apply the bias charge of fat "0". One of the methods utilizes a light through a photo-diode or the like so as to apply the bias charge, and another of the methods is to provide a diffusion layer at the input portion of the image pick-up element through which the bias charge is applied electrically. By the method using the light, however, since the light is incident on the side of the pick-up element, the light intensity is different between the peripheral portion and central portion of the pick-up element, which will generate a so-called shading. While according to the method to electrically apply the bias charge through the input portion directly, as shown in FIGS. 1A and 1B, the scattering of the surface potentials at the input gate make bias charge amounts Q.sub.A and Q.sub.A ' of respective registers different, which will appear on a picture screen as thin longitudinal lines of a fixed pattern noise, so that it is desired to apply the fat "0" uniformly to the registers. FIG. 1A shows a register in which the surface potential at the input gate is uniform, while FIG. 1B shows a register in which the surface potential at the input gate is scattered.